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M

Mateo Valero

universitat politecnica de catalunya

57H-index
619Paper Count
1.4WCitation Count
Published Papers 39
Publication Date
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Semi-automatic validation of cycle-accurate simulation infrastructures: The case for gem5-x86
errFUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE
IF6.1
err2020-11-01
err3
errOAAI
errCebrian, Juan M.; Barredo, Adrian; Caminal, Helena; Moreto, Miquel; Casas, Marc; Valero, Mateo
errShare
errSave
Advances in the Hierarchical Emergent Behaviors (HEB) Approach to Autonomous Vehicles
errIEEE INTELLIGENT TRANSPORTATION SYSTEMS MAGAZINE
IF5
err2020-01-01
err1
PREAI
errRoca, Damian; Milito, Rodolfo; Nemirovsky, Mario; Valero, Mateo
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errSave
A Hardware Runtime for Task-Based Programming Models
errIEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
IF6
err2019-09-01
err12
PREAI
errTan, Xubin; Bosch, Jaume; Alvarez, Carlos; Jimenez-Gonzalez, Daniel; Ayguade, Eduard; Valero, Mateo
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errSave
On the maturity of parallel applications for asymmetric multi-core processors
errJOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING
IF4
err2019-05-01
err8
errOAAI
errChronaki, Kallia; Moreto, Miguel; Casas, Marc; Rico, Alejandro; Badia, Rosa M.; Ayguade, Eduard; Valero, Mateo
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errSave
Asynchronous and Exact Forward Recovery for Detected Errors in Iterative Solvers
errIEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
IF6
err2018-09-01
err3
errOAAI
errJaulmes, Luc; Moreto, Miquel; Ayguade, Eduard; Labarta, Jesus; Valero, Mateo; Casas, Marc
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errSave
Reducing Cache Coherence Traffic with a NUMA-Aware Runtime Approach
errIEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
IF6
err2018-05-01
err10
errOAAI
errCaheny, Paul; Alvarez, Lluc; Derradji, Said; Valero, Mateo; Moreto, Miquel; Casas, Marc
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errSave
Task Scheduling Techniques for Asymmetric Multi-Core Systems
errIEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
IF6
err2017-07-01
err42
errOAAI
errChronaki, Kallia; Rico, Alejandro; Casas, Marc; Moreto, Miquel; Badia, Rosa M.; Ayguade, Eduard; Labarta, Jesus; Valero, Mateo
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errSave
Interconnection Networks in Petascale Computer Systems: A Survey
errACM COMPUTING SURVEYS
IF28
err2016-09-16
err16
PREAI
errTrobec, Roman; Vasiljevic, Radivoje; Tomasevic, Milo; Milutinovic, Veljko; Beivide, Ramon; Valero, Mateo
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errSave
Alya: Multiphysics engineering simulation toward exascale
errnature computational science
IF3.7
err2016-05-01
err145
errOAAI
errVazquez, Mariano; Houzeaux, Guillaume; Koric, Seid; Artigues, Antoni; Aguado-Sierra, Jazmin; Aris, Ruth; Mira, Daniel; Calmet, Hadrien; Cucchietti, Fernando; Owen, Herbert; Taha, Ahmed; Burness, Evan Dering; Maria Cela, Jose; Valero, Mateo
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errSave
Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2016-01-01
err15
errOAAI
errRadojkovic, Petar; Carpenter, Paul M.; Moreto, Miguel; Cakarevic, Vladimir; Verdu, Javier; Pajuelo, Alex; Cazorla, Francisco J.; Nemirovsky, Mario; Valero, Mateo
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errSave
Picos. A hardware runtime architecture support for OmpSs
errFUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE
IF6.1
err2015-12-01
err14
errOAAI
errYazdanpanah, Fahimeh; Alvarez, Carlos; Jimenez-Gonzalez, Daniel; Badia, Rosa M.; Valero, Mateo
errShare
errSave
Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation
errACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS
IF2
err2014-11-18
err0
PREAI
errMaric, Bojan; Abella, Jaume; Cazorla, Francisco J.; Valero, Mateo
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errSave
Analyzing the Efficiency of L1 Caches for Reliable Hybrid-Voltage Operation Using EDC Codes
errIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
IF3.1
err2014-10-01
err2
PREAI
errMaric, Bojan; Abella, Jaume; Valero, Mateo
errShare
errSave
Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors
errIEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS
IF6
err2013-12-01
err17
errOAAI
errRadojkovic, Petar; Cakarevic, Vladimir; Verdu, Javier; Pajuelo, Alex; Cazorla, Francisco J.; Nemirovsky, Mario; Valero, Mateo
errShare
errSave
Programmability and portability for exascale: Top down programming methodology and tools with StarSs
errnature computational science
IF3.7
err2013-11-01
err13
PREAI
errSubotic, Vladimir; Brinkmann, Steffen; Marjanovic, Vladimir; Badia, Rosa M.; Gracia, Jose; Niethammer, Christoph; Ayguade, Eduard; Labarta, Jesus; Valero, Mateo
errShare
errSave
Moving from Petaflops to Petadata
errCOMMUNICATIONS OF THE ACM
IF12.2
err2013-05-01
err49
PREAI
errFlynn, Michael J.; Mencer, Oskar; Milutinovic, Veljko; Rakocevic, Goran; Stenstrom, Per; Trobec, Roman; Valero, Mateo
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errSave
SMT Malleability in IBM POWER5 and POWER6 Processors
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2013-04-01
err7
PREAI
errMorari, Alessandro; Boneti, Carlos; Cazorla, Francisco J.; Gioiosa, Roberto; Cher, Chen-Yong; Buyuktosunoglu, Alper; Bose, Pradip; Valero, Mateo
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errSave
Dynamic Tolerance Region Computing for Multimedia
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2012-05-01
err21
PREAI
errAlvarez Martinez, Carlos; Corbal San Adrian, Jesus; Valero Cortes, Mateo
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errSave
Understanding the future of energy-performance trade-off via DVFS in HPC environments
errJOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING
IF4
err2012-04-01
err53
PREAI
errEtinski, M.; Corbalan, J.; Labarta, J.; Valero, M.
errShare
errSave
CPU Accounting for Multicore Processors
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2012-02-01
err7
PREAI
errLuque, Carlos; Moreto, Miquel; Cazorla, Francisco J.; Gioiosa, Roberto; Buyuktosunoglu, Alper; Valero, Mateo
errShare
errSave

Research Directions

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Co-authors
Cooperation Journals
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Jack Dongarra
H-index: 112 · Papers: 2.1K
J
J. M. Gonzalez Castro
H-index: 79 · Papers: 180
T
Thom H. Dunning
H-index: 71 · Papers: 241
A
Alok Choudhary
H-index: 65 · Papers: 694
R
Robert J. Harrison
H-index: 62 · Papers: 438
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