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Advait Madhavan

national institute of standards and technology

16H-index
69Paper Count
1.4KCitation Count
Published Papers 16
Publication Date
130-nm CMOS-Integrated Superparamagnetic Tunnel Junction-Based p-bit
err2026-05-26
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PREAI
errJu-Young Yoon; Nuno Caçoilo; Advait Madhavan; Jabez J. McClelland; Shun Kanai; Hideo Ohno; Shunsuke Fukami; William A. Borders
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Metrics for spin-based computing
err2026-02-27
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PREAI
errHidekazu Kurebayashi; Giovanni Finocchio; Karin Everschor-Sitte; Jack C. Gartside; Tomohiro Taniguchi; Artem Litvinenko; Akash Kumar; Johan Åkerman; Eleni Vasilaki; Kemal Selçuk; Kerem Y. Çamsarı; Advait Madhavan; Shunsuke Fukami
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ReRAM/CMOS Array Integration and Characterization via Design of Experiments
err2025-07-21
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errOAAI
errImtiaz Hossen; William A. Borders; Advait Madhavan; Shweta Joshi; Patrick M. Braganca; Jabez J. McClelland; Brian D. Hoskins; Gina C. Adam
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Delay-Space Arithmetic and Architecture
err2025-07-01
err0
PREAI
errGretsch, Rhys; Song, Peiyang; Madhavan, Advait; Lau, Jeremy; Sherwood, Timothy
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Measurement-driven Langevin modeling of superparamagnetic tunnel junctions
err2024-07-23
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errOAAI
errPocher, Liam A.; Adeyeye, Temitayo N.; Gibeault, Sidra; Talatchian, Philippe; Ebels, Ursula; Lathrop, Daniel P.; McClelland, Jabez J.; Stiles, Mark D.; Madhavan, Advait; Daniels, Matthew W.
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Measurement-driven neural-network training for integrated magnetic tunnel
err2024-05-14
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errOAAI
errBorders, William A.; Madhavan, Advait; Daniels, Matthew W.; Georgiou, Vasileia; Lueker-Boden, Martin; Santos, Tiffany S.; Braganca, Patrick M.; Stiles, Mark D.; McClelland, Jabez J.; Hoskins, Brian D.
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Unbiased random bitstream generation using injection-locked spin-torque nano-oscillators
err2024-03-29
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errOAAI
errPhan, Nhat-Tan; Prasad, Nitin; Hakam, Abderrazak; El Valli, Ahmed Sidi; Anghel, Lorena; Benetti, Luana; Madhavan, Advait; Jenkins, Alex S.; Ferreira, Ricardo; Stiles, Mark D.; Ebels, Ursula; Talatchian, Philippe
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Programmable electrical coupling between stochastic magnetic tunnel junctions
err2024-03-29
err3
errOAAI
errGibeault, Sidra; Adeyeye, Temitayo N.; Pocher, Liam A.; Lathrop, Daniel P.; Daniels, Matthew W.; Stiles, Mark D.; Mcclelland, Jabez J.; Borders, William A.; Ryan, Jason T.; Talatchian, Philippe; Ebels, Ursula; Madhavan, Advait
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Implementation of a Binary Neural Network on a Passive Array of Magnetic Tunnel Junctions
err2022-07-18
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errOAAI
errGoodwill, Jonathan M.; Prasad, Nitin; Hoskins, Brian D.; Daniels, Matthew W.; Madhavan, Advait; Wan, Lei; Santos, Tiffany S.; Tran, Michael; Katine, Jordan A.; Braganca, Patrick M.; Stiles, Mark D.; McClelland, Jabez J.
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Mutual control of stochastic switching for two electrically coupled superparamagnetic tunnel junctions
err2021-08-19
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errOAAI
errTalatchian, Philippe; Daniels, Matthew W.; Madhavan, Advait; Pufall, Matthew R.; Jue, Emilie; Rippard, William H.; McClelland, Jabez J.; Stiles, Mark D.
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Impact ionization-induced bistability in CMOS transistors at cryogenic temperatures for capacitorless memory applications
err2021-07-29
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errOAAI
errZaslavsky, A.; Richter, C. A.; Shrestha, P. R.; Hoskins, B. D.; Le, S. T.; Madhavan, A.; McClelland, J. J.
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In-Sensor Classification With Boosted Race Trees
err2021-05-24
err1
PREAI
errTzimpragos, Georgios; Madhavan, Advait; Vasudevan, Dilip; Strukov, Dmitri; Sherwood, Timothy
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Energy-Efficient Stochastic Computing with Superparamagnetic Tunnel Junctions
err2020-03-05
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errOAAI
errDaniels, Matthew W.; Madhavan, Advait; Talatchian, Philippe; Mizrahi, Alice; Stiles, Mark D.
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Streaming Batch Eigenupdates for Hardware Neural Networks
err2019-08-06
err12
errOAAI
errHoskins, Brian D.; Daniels, Matthew W.; Huang, Siyuan; Madhavan, Advait; Adam, Gina C.; Zhitenev, Nikolai; McClelland, Jabez J.; Stiles, Mark D.
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A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit (vol 7, 42429, 2017)
err2017-07-27
err1
errOAAI
errChakrabarti, B.; Lastras-Montano, M. A.; Adam, G.; Prezioso, M.; Hoskins, B.; Payvand, M.; Madhavan, A.; Ghofrani, A.; Theogarajan, L.; Cheng, K. -T.; Strukov, D. B.
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