Unai Bidarte - Publications, H-index & Citations

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Unai Bidarte

university of basque country

15H-index

94Paper Count

787Citation Count

Published Papers 14

Publication Date

Embedded firewall for on-chip bus transactions

COMPUTERS & ELECTRICAL ENGINEERING

IF4.9

2022-03-01

OAAI

Lazaro, Jesus; Bidarte, Unai; Muguira, Leire; Astarloa, Armando; Jimenez, Jaime

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Fast and efficient address search in System-on-a-Programmable-Chip using binary trees

COMPUTERS & ELECTRICAL ENGINEERING

IF4.9

2021-12-01

OAAI

Lazaro, Jesus; Bidarte, Unai; Muguira, Leire; Cuadrado, Carlos; Jimenez, Jaime

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A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems

IEEE ACCESS

IF3.6

2021-01-01

OAAI

Rodriguez, Mikel; Lazaro, Jesus; Bidarte, Unai; Jimenez, Jaime; Astarloa, Armando

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Smart Sensor: SoC Architecture for the Industrial Internet of Things

IEEE INTERNET OF THINGS JOURNAL

IF8.9

2019-08-01

PREAI

Urbina, Marcelo; Acosta, Tatiana; Lazaro, Jesus; Astarloa, Armando; Bidarte, Unai

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SEU emulation in industrial SoCs combining microprocessor and FPGA

RELIABILITY ENGINEERING & SYSTEM SAFETY

IF11

2018-02-01

PREAI

Villalta, Igor; Bidarte, Unai; Gomez-Cornejo, Julen; Jimenez, Jaime; Lazaro, Jesus

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On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems

IEEE TRANSACTIONS ON SMART GRID

IF9.8

2017-07-01

PREAI

Moreira, Naiara; Lazaro, Jesus; Bidarte, Unai; Jimenez, Jaime; Astarloa, Armando

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Cyber-Physical Production System Gateway Based on a Programmable SoC Platform

IEEE ACCESS

IF3.6

2017-01-01

OAAI

Urbina, Marcelo; Astarloa, Armando; Lazaro, Jesus; Bidarte, Unai; Villalta, Igor; Rodriguez, Mikel

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Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

RELIABILITY ENGINEERING & SYSTEM SAFETY

IF11

2016-07-01

PREAI

Kretzschmar, U.; Gomez-Cornejo, J.; Astarloa, A.; Bidarte, U.; Del Ser, J.

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I2CSec: A secure serial Chip-to-Chip communication protocol

JOURNAL OF SYSTEMS ARCHITECTURE

IF4.1

2011-02-01

PREAI

Lazaro, Jesus; Astarloa, Armando; Zuloaga, Aitzol; Bidarte, Unai; Jimenez, Jaime

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Matrix Converter Protection and Computational Capabilities Based on a System on Chip Design With an FPGA

IEEE TRANSACTIONS ON POWER ELECTRONICS

IF6.5

2011-01-01

PREAI

Ormaetxea, Enekoitz; Andreu, Jon; Kortabarria, Inigo; Bidarte, Unai; Martinez de Alegria, Inigo; Ibarra, Edorta; Olaguenaga, Ekaitz

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FPGA technology for multi-axis control systems

MECHATRONICS

IF3.1

2009-03-01

PREAI

Astarloa, Armando; Lazaro, Jesus; Bidarte, Unai; Jimenez, Jaime; Zuloaga, Aitzol

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Hardware architecture for a general regression neural network coprocessor

NEUROCOMPUTING

IF6.5

2007-12-01

PREAI

Lazaro, Jesus; Arias, Jagoba; Astarloa, Armando; Bidarte, Unai; Zuloaga, Aitzol

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Design of a master device for the multifunction vehicle bus

IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY

IF7.1

2007-11-01

PREAI

Jimenez, Jaime; Martin, Jose L.; Bidarte, Unai; Astarloa, Armando; Zuloaga, Aiuol

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Tornado:: A self-reconfiguration control system for core-based multiprocessor CSoPCs

JOURNAL OF SYSTEMS ARCHITECTURE

IF4.1

2007-09-01

PREAI

Astarloa, Armando; Zuloaga, Aitzol; Bidarte, Unai; Martin, Jose Luis; Lazaro, Jesus; Jimenez, Jaime

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Research Directions