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Analog Integrated Circuits and Signal Processing 封面图

Analog Integrated Circuits and Signal Processing

IF1.4
论文数183
被引数2142
期刊论文 183
发表时间
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An efficient underwater OFDM framework for Doppler-resilient and sparse channel estimation一种高效的水下OFDM框架，用于抗多普勒效应和稀疏信道估计
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-18
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PREAI
deleteKumar, Anand
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Design and analysis of gate underlapped GOI junctionless FinFET in presence of temperature variations for RF IC design applications在温度变化下用于射频IC设计应用的栅极非重叠GOI结自由鳍式场效应晶体管的设计与分析
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-06
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PREAI
deleteSom, Arnab; Yadav, Meenu; Jana, Sanjay Kumar
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Design of high performance capacitorless 1T-DRAM with PDSOI-UTB FinFET高性能无电容1T-DRAM的PDSOI-UTB FinFET设计
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-06
delete1
PREAI
deleteRathi, Mitali; Mishra, Guru Prasad
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Resistorless memcapacitor emulator无电阻忆容仿真器
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-06
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PREAI
deleteKumar, Pratik; Shukla, Garima; Paul, Sajal K.
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Binary wind driven optimization techniques for Metamaterial Cross Polarizer二元风驱动优化技术用于超材料交叉极化器
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-05
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PREAI
deleteBarde, Chetan; Ranjan, Prakash; Gupta, Neelesh Kumar; Choubey, Arvind; Roy, Komal
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FPGA-based implementation of the mechanization block基于FPGA的机电一体化模块实现
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-02
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PREAI
deleteAboutalebi, A.; Alaeiyan, H.; Mosavi, M. R.
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Power-aware test pattern generation with LP-LFSRs and counter-assisted gray code for VLSI BIST基于LP-LFSRs和计数器辅助格雷码的VLSI BIST功耗感知测试模式生成
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-02
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PREAI
deleteThangam, C.; Manjith, R.
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Low power and highly stable 10 T SRAM cell design using stacked and MTCMOS techniques采用堆叠和MTCMOS技术的低功耗高稳定性10T SRAM单元设计
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-01
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PREAI
deleteIslam, Md. Mozahidul; Zaman, Fariha; Amin, Md. Tawfiq
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Energy-efficient and fault-tolerant demultiplexer design in QCA nanotechnology在QCA纳米技术中的节能容错多路分配器设计
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-01
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PREAI
deleteSharma, Vijay Kumar
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FPGA enabled decoder design for multi-kernal polar codes in 5G communicationFPGA实现的多核极化码译码器设计在5G通信中的应用
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-05-01
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PREAI
deleteMoulana; Niranjil Kumar, A.
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Improving operational efficiency in photovoltaic systems with advanced fault monitoring solutions using machine learning algorithms利用机器学习算法的高级故障监测方案提升光伏系统运行效率
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-28
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PREAI
deleteVijayasarathi, N.; Ravindran, Vijay
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A comprehensive review and multi-parameter analysis of CMOS double-balanced Gilbert cell mixers across technology nodes from 180-22 nm从180 nm到22 nm技术节点CMOS双平衡吉尔伯特单元混频器的全面综述和多参数分析
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-24
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PREAI
deleteGupta, Richa; Prasad, P. Hari Krishna
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Optimizing deep convolutional neural network with an IP-bounded binary optimization and optimal extreme learning machine for pulse repetition interval modulation recognition采用IP约束二进制优化和最优极限学习机的深度卷积神经网络优化，用于脉冲重复间隔调制识别
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-21
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PREAI
deleteZheng, Xiaoxia; Azhdari, Seyed Majid Hasani; Khishe, Mohammad; Mahmoodzadeh, Azar; Agahi, Hamed
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A 0.5V Energy efficient compact CMOS temperature sensor with a resolution of 0.08°C for portable applications一款适用于便携式应用的0.5V低功耗紧凑型CMOS温度传感器，分辨率为0.08°C
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-13
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PREAI
deleteJayaram, Chilaka; Rao, Patri Sreehari
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Optimization of novel DPTL-PFD design for fast-settling PLL frequency synthesizer using Taguchi-ANOVA (vol 126, 32, 2026)基于田口-ANOVA方法对快速锁定PLL频率合成器的新型DPTL-PFD设计的优化（卷126，第32期，2026年）
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-10
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PREAI
deleteSinghal, Archana; Sharma, Jyoti; Rajput, Dheeraj Singh; Boolchandani, Dharmendar; Periasamy, C.
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Power-efficient 2:1 MUX and 1:2 DEMUX architectures in 90 NM technology using SVL and FinFET approaches基于SVL和FinFET方法的90纳米工艺下高能效2:1多路选择器与1:2多路分配器架构
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-06
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PREAI
deleteMane, Shekhar Milind; Pete, Dnyandeo J.
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Reinforcement learning-driven fault-tolerant routing for mesh-based Network-on-Chip architectures基于强化学习的网格型片上网络架构的容错路由
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-01
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PREAI
deleteYadav, Challa Muralikrishna; Reddy, B. Naresh Kumar
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Triple metal gate vertical TFET with SiGe/Si heterojunction for high-performance and low-power VLSI circuitsSiGe/Si异质结三金属栅极垂直TFET用于高性能和低功耗VLSI电路
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-04-01
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PREAI
deleteMohanta, Debasish; Singh, Sruti Suvadarsini; Sahu, Prasanna Kumar
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Analyzing time and power efficiency of machine learning models on edge devices分析机器学习模型在边缘设备上的时间和能效
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-03-26
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PREAI
deleteKhdr, Heba; Ahmed, Mohamed Aboelenien; Oguz, Yigit; Henkel, Jorg
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Study and analysis of memristor for analog and digital design忆阻器在模拟与数字设计中的研究与分析
deleteAnalog Integrated Circuits and Signal Processing
IF1.4
delete2026-03-24
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PREAI
deletePandya, Jalpaben; Gupta, Ramji
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