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Yiorgos Tsiatouhas

University of Ioannina

13H指数
140论文数
846被引数
收录论文 10
发表时间
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Radiation-hardened latch design with triple-node-upset recoverability
errAEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS
IF3.2
err2024-12-01
err1
PREAI
errPaparsenos, Evangelos; Tsiatouhas, Yiorgos
err分享
err收藏
Testing Neighbouring Cell Leakage and Transition Induced Faults in DRAMs
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2016-07-01
err4
PREAI
errSfikas, Yiorgos; Tsiatouhas, Yiorgos
err分享
err收藏
Timing Error Tolerance in Small Core Designs for SoC Applications
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2016-02-01
err12
PREAI
errValadimas, Stefanos; Tsiatouhas, Yiorgos; Arapoyanni, Angela
err分享
err收藏
The Time Dilation Technique for Timing Error Tolerance
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2014-05-01
err15
PREAI
errValadimas, Stefanos; Floros, Andreas; Tsiatouhas, Yiorgos; Arapoyanni, Angela; Kavousianos, Xrysovalantis
err分享
err收藏
New High-Speed Multioutput Carry Look-Ahead Adders新型高速多输出进位前瞻加法器
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF4.9
err2013-10-01
err24
PREAI
errEfstathiou, Costas; Owda, Zaher; Tsiatouhas, Yiorgos
err分享
err收藏
A Built-In Voltage Measurement Technique for the Calibration of RF Mixers用于校准RF混频器的内置电压测量技术
errIEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT
IF5.9
err2013-04-01
err9
PREAI
errLiaperdos, John; Arapoyanni, Angela; Tsiatouhas, Yiorgos
err分享
err收藏
A Built-In-Test Circuit for RF Differential Low Noise Amplifiers一种射频差分低噪声放大器的内建测试电路
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2010-07-01
err24
PREAI
errDermentzoglou, Lambros E.; Arapoyanni, Angela; Tsiatouhas, Yiorgos
err分享
err收藏
A current mode, parallel, two-rail code checker
errIEEE TRANSACTIONS ON COMPUTERS
IF3.8
err2008-08-01
err1
PREAI
errMatakias, Sotiris; Tsiatouhas, Yiorgos; Haniotakis, Themistoklis; Arapoyanni, Angela
err分享
err收藏
A stress-relaxed negative voltage-level converter
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
IF4.9
err2007-03-01
err9
PREAI
errTsiatouhas, Yiorgos E.
err分享
err收藏
A design technique for energy reduction in NORA CMOS logic
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2006-12-01
err8
PREAI
errLimniotis, Konstantinos; Tsiatouhas, Yiorgos; Haniotakis, Themistoklis; Arapoyanni, Angela
err分享
err收藏

研究方向

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合作学者
合作期刊
X
Xrysovalantis Kavousianos
H 指数: 16 · 论文数: 80
A
Andreas Floros
H 指数: 14 · 论文数: 115
T
Themistoklis Haniotakis
H 指数: 12 · 论文数: 75
K
Konstantinos Limniotis
H 指数: 10 · 论文数: 62
A
Angela Arapoyanni
H 指数: 9 · 论文数: 33
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