T.R. Viswanathan - Publications, H-index & Citations

T.R. Viswanathan

university of texas system

20H指数

112论文数

2.7K被引数

收录论文 8

发表时间

A Single-Step Subranging Relaxation Oscillator-Based Open-Loop Sigma-Delta ADC

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

IF5.2

2023-03-01

PREAI

Vasishta, Sudhanva; Raghunandan, K. R.; Dodabalapur, Ananth; Viswanathan, T. R.

A Two-Stage ADC Architecture With VCO-Based Second Stage

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2011-11-01

PREAI

Gupta, A. K.; Nagaraj, K.; Viswanathan, T. R.

A Discrete-Time Input ΔΣ ADC Architecture Using a Dual-VCO-Based Integrator

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2010-11-01

PREAI

Hamilton, Joseph; Yan, Shouli; Viswanathan, T. R.

Self-Biased Unity-Gain Buffers With Low Gain Error

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2009-01-01

PREAI

Xing, Guangmao; Lewis, Stephen H.; Viswanathan, T. R.

A low-supply-voltage CMOS sub-bandgap reference

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2008-07-01

PREAI

Becker-Gomez, Adriana; Viswanathan, T. Lakshmi; Viswanathan, T. R.

CMOS latch using quad for high-speed comparators

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2007-05-01

PREAI

Acharya, Venkatesh; Viswanathan, T. Lakshmi; Viswanathan, T. R.

Integrated circuit testing for quality assurance in manufacturing: History, current status, and future trends 用于制造质量保证的集成电路测试: 历史，现状和未来趋势

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

1997-01-01

PREAI

Grochowski, A; Bhattacharya, D; Viswanathan, TR; Laker, K

A level-crossing sampling scheme for A/D conversion

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

1996-04-01

201

PREAI

Sayiner, N; Sorensen, HV; Viswanathan, TR

研究方向