K. Nagaraj - Publications, H-index & Citations

K. Nagaraj

texas instruments

21H指数

96论文数

1.6K被引数

收录论文 5

发表时间

Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference (vol 59, pg 331, 2012)

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2014-08-01

OAAI

Pu, Xiao; Kumar, Ajay; Nagaraj, Krishnaswamy

Architectures and Circuit Techniques for Multi-Purpose Digital Phase Lock Loops

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

IF5.2

2013-03-01

PREAI

Nagaraj, Krishnaswamy; Kamath, Anant S.; Subburaj, Karthik; Chattopadhyay, Biman; Nayak, Gopalkrishna; Evani, Satya Sai; Nayak, Neeraj P.; Prathapan, Indu; Zhang, Frank; Haroun, Baher

Area-Efficient Low-Noise Low-Spur Architecture for an Analog PLL Working From a Low Frequency Reference

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2012-06-01

PREAI

Pu, Xiao; Kumar, Ajay; Nagaraj, Krishnaswamy

A Two-Stage ADC Architecture With VCO-Based Second Stage

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2011-11-01

PREAI

Gupta, A. K.; Nagaraj, K.; Viswanathan, T. R.

STATIC RAM CELL FOR TERNARY LOGIC

PROCEEDINGS OF THE IEEE

IF25.9

1984-01-01

PREAI

NAGARAJ, K; RAMKUMAR, K

研究方向