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Francesco Menichelli

sapienza university rome

14H指数
89论文数
789被引数
收录论文 11
发表时间
Eight-Bit Vector SoftFloat Extension for the RISC-V Spike SimulatorRISC-V Spike模拟器的八位向量软浮点扩展
err2026-03-03
err0
errOAAI
errAndrea Marcelli; Abdallah Cheikh; Marcello Barbirotta; Antonio Mastrandrea; Francesco Menichelli; Mauro Olivieri
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Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme
err2024-07-01
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errOAAI
errAngioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro
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A RISC-V Fault-Tolerant Soft-Processor Based on Full/Partial Heterogeneous Dual-Core Protection
err2024-01-01
err1
errOAAI
errVigli, Francesco; Barbirotta, Marcello; Cheikh, Abdallah; Menichelli, Francesco; Mastrandrea, Antonio; Olivieri, Mauro
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Dynamic Triple Modular Redundancy in Interleaved Hardware Threads: An Alternative Solution to Lockstep Multi-Cores for Fault-Tolerant Systems
err2024-01-01
err2
errOAAI
errBarbirotta, Marcello; Menichelli, Francesco; Cheikh, Abdallah; Mastrandrea, Antonio; Angioli, Marco; Olivieri, Mauro
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Portable Temperature-Controlled System Integrating Thin-Film Sensors and Actuators for Biochemical Analysis on Transparent Substrate
err2023-01-01
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errOAAI
errLovecchio, Nicola; Menichelli, Francesco; Di Meo, Valentina; Casalinuovo, Silvia; Crescitelli, Alessio; Esposito, Emanuela; De Cesare, Giampiero; Caputo, Domenico
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Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors
err2022-01-01
err11
errOAAI
errBarbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro
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High-level side-channel attack modeling and simulation for security-critical systems on chips
err2008-07-01
err21
PREAI
errMenichelli, Francesco; Menicocci, Renato; Olivieri, Mauro; Trifiletti, Alessandro
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