Jinshan Yue - Publications, H-index & Citations

Jinshan Yue

chinese academy of sciences

20H指数

109论文数

1.4K被引数

收录论文 31

发表时间

A 28-nm System-in-One-Macro Computing-in-Memory Chip Utilizing Leakage-Eliminated 2T1C and Capacitor-Over-Logic 1T1C eDRAM 基于消除漏电流的2T1C和电容-逻辑1T1C eDRAM的28纳米单片内存计算芯片

IEEE Journal of Solid-State Circuits

IF5.6

2026-04-24

PREAI

Zhihang Qian; Zhaori Cong; Shengzhe Yan; Zeyu Guo; Zhuoyu Dai; Yifan He; Wenyu Sun; Chunmeng Dou; Feng Zhang; Di Geng; Jinshan Yue; Yongpan Liu; Qi Liu; Ming Liu

A 28-nm Digital Transpose SRAM Compute-in-Memory Macro With Accurate/Approximate Dual Mode for Floating-Point Edge Training and Inference 28纳米数字转置SRAM存内计算宏，具有精确/近似双模式，适用于浮点边缘训练和推理

IEEE Journal of Solid-State Circuits

IF5.6

2026-04-07

PREAI

Yiyang Yuan; Bingxin Zhang; Yiming Yang; Yishan Luo; Qirui Chen; Haitao Wang; Qihao Liu; Zhiming Chen; Hao Wu; Jinshan Yue; Shidong Lv; Xinghua Wang; Pui-In Mak; Xiaoran Li; Feng Zhang

A 28-nm Hybrid-Domain Outer Product-Based Floating-Point SRAM Computing-in-Memory Macro With Logarithm Bit-Width Residual ADC for Edge AI 基于28纳米混合域外积的浮点SRAM存内计算宏，含对数位宽残余ADC，用于边缘人工智能

IEEE Journal of Solid-State Circuits

IF5.6

2026-03-03

PREAI

Yiyang Yuan; Zhongyi Sun; Yiming Yang; Xinghua Wang; Xiaoran Li; Cailian Ma; Qirui Chen; Meini Tang; Xi Wei; Hao Wu; Haitao Wang; Qihao Liu; Chengying Chen; Jinshan Yue; Pui-In Mak; Feng Zhang

A hybrid-tiling attention accelerator with a fully-pipelined balanced systolic array in 3D hybrid-bonding near-DRAM integration 一种具有完全流水线平衡脉动阵列的混合平铺注意力加速器，采用3D混合键合近DRAM集成

Microelectronics Journal

IF2.3

2026-02-01

PREAI

Han, Zhongze; Gao, Hanghang; Li, Weizeng; Li, Zhi; Zhou, Zhidao; Wang, Yiman; Shen, Junzhe; Zhu, Junyu; Wang, Bohan; Yang, Jianguo; Yue, Jinshan; Hu, Hongyang; Dou, Chunmeng

A 14-nm Nonvolatile-Volatile-Fused Compute-In-Memory Macro Based on Logic-Compatible Flash for Plastic Neural Networks 基于逻辑兼容闪存的14纳米非易失性-易失性融合存内计算宏用于可塑性神经网络

IEEE Journal of Solid-State Circuits

IF5.6

2026-01-28

PREAI

Weizeng Li; Linfang Wang; Zhidao Zhou; Zhi Li; Wang Ye; Junyu Zhu; Junzhe Shen; Bohan Wang; Hanghang Gao; Hongyang Hu; Jing Liu; Jinshan Yue; Jianguo Yang; Qing Luo; Qi Liu; Chunmeng Dou; Yang Chai; Ming Liu

Improved Reliability of Short-Channel IGZO TFTs With Hydrogen Scavenger Gate Metal

IEEE Electron Device Letters

IF4.5

2025-12-18

PREAI

Zihan Li; Menggan Liu; Guanhua Yang; Fuxi Liao; Kaifei Chen; Xuanming Zhang; Naide Mao; Congyan Lu; Jiebin Niu; Jinshan Yue; Zhicheng Wu; Jiawei Wang; Lingfei Wang; Di Geng; Nianduan Lu; Arokia Nathan; Ling Li

High-density three-dimensional integration of dynamic random-access memory using vertical dual-gate IGZO TFTs 采用垂直双栅IGZO TFT的高密度三维动态随机存取存储器集成

Nature Communications

IF15.7

2025-12-08

OAAI

Fuxi Liao; Zhengyong Zhu; Zihan Li; Guanhua Yang; Menggan Liu; Kaifei Chen; Wendong Lu; Zijing Wu; Xuanming Zhang; Naide Mao; Bok-Moon Kang; Jinghong Shi; Xie-Shuai Wu; Meichen Jin; Chang liu; Jing Zhang; Yong Yu; Gui-Lei Wang; Congyan Lu; Jinshan Yue; Lingfei Wang; Jiawei Wang; Di Geng; Nianduan Lu; Chao Zhao; Arokia Nathan; Ling Li; Ming Liu

An area/energy-efficient RRAM computing-in-memory macro with fully-charge-domain multi-bit computation 一种面积/能量高效的RRAM存内计算宏，采用全电荷域多比特计算

Science China Information Sciences

IF7.6

2025-11-18

PREAI

Zhi Li; Shengzhe Yan; Jun Wang; Zhuoyu Dai; Zeyu Guo; Zhaori Cong; Zhihang Qian; Xiangqu Fu; Xu Zheng; Chunmeng Dou; Dashan Shang; Jinshan Yue

A 28-nm Computing-in-Memory Processor With Zig-Zag Backbone-Systolic CIM and Block-/Self-Gating CAM for NN/Recommendation Applications

IEEE Journal of Solid-State Circuits

IF5.6

2025-09-22

PREAI

Shengzhe Yan; Zhuoyu Dai; Zhaori Cong; Zeyu Guo; Yifan He; Wenyu Sun; Chunmeng Dou; Feng Zhang; Jinshan Yue; Yongpan Liu; Ming Liu

An Area-Efficient Lookup-Table -Based eDRAM Digital CIM Macro for Neural Network Inference 一种基于查找表的低面积消耗eDRAM数字CIM宏模块，用于神经网络推理

IEEE Journal of Solid-State Circuits

IF5.6

2025-08-18

PREAI

Yifan He; Shupei Fan; Xuan Li; Luchang Lei; Wenbin Jia; Chen Tang; Yaolei Li; Zongle Huang; Zhike Du; Jinshan Yue; Xueqing Li; Huazhong Yang; Hongyang Jia; Yongpan Liu

A 28-nm 88.3-TFLOPS/W POSIT-Approximate-Calculation-Based Digital Computing-in-Memory Macro Incorporating Final-Cycle Fusion and Joint Skipping

IEEE Journal of Solid-State Circuits

IF5.6

2025-08-05

PREAI

Hao Wu; Yong Chen; Ming Li; Bingxin Zhang; Rui Zhang; Yiyang Yuan; Yiming Yang; Jinshan Yue; Xinghua Wang; Xiaoran Li; Feng Zhang

A High-Density Energy-Efficient CNM Macro Using Hybrid RRAM and SRAM for Memory-Bound Applications 一种高密度、能效高的CNM宏模块，采用混合RRAM和SRAM技术，适用于内存受限应用

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IF3.1

2025-08-01

PREAI

Jun Wang; Shengzhe Yan; Xiangqu Fu; Zhihang Qian; Zhi Li; Zeyu Guo; Zhuoyu Dai; Zhaori Cong; Chunmeng Dou; Feng Zhang; Jinshan Yue; Dashan Shang

An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet 一种基于RRAM的计算内存储器宏，具有低功耗读出/保持电路和用于AdderNet的激活差分策略

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IF3.1

2025-07-01

PREAI

Zhihang Qian; Shengzhe Yan; Zhuoyu Dai; Zeyu Guo; Zhaori Cong; Yifan He; Chunmeng Dou; Feng Zhang; Jinshan Yue; Yongpan Liu

Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm² Density in 28nm CMOS 阴 G, 杨 L, 牛 T, 等. 基于单晶粒磨削的4H-SiC材料去除机制研究及工艺参数优化[J]. 巴西机械科学与工程学会志, 2025, 47(3): 1-14.

IEEE Journal of Solid-State Circuits

IF5.6

2025-04-15

PREAI

Guodong Yin; Yiming Chen; Mingyen Lee; Xirui Du; Yue Ke; Wenjun Tang; Zhonghao Chen; Mufeng Zhou; Jinshan Yue; Huazhong Yang; Hongyang Jia; Yongpan Liu; Xueqing Li

A monolithic 3D IGZO-RRAM-SRAM-integrated architecture for robust and efficient compute-in-memory enabling equivalent-ideal device metrics 一种单块3D IGZO-RRAM-SRAM集成架构，用于实现鲁棒且高效的存内计算，并确保等效理想器件指标。

SCIENCE CHINA-INFORMATION SCIENCES

IF7.6

2025-01-15

PREAI

Yan, Shengzhe; Cong, Zhaori; Wang, Zi; Dai, Zhuoyu; Guo, Zeyu; Qian, Zhihang; Li, Xufan; Zheng, Xu; Chen, Chuanke; Lu, Nianduan; Dou, Chunmeng; Yang, Guanhua; Xu, Xiaoxin; Geng, Di; Yue, Jinshan; Li, Ling; Liu, Ming

Hardware Implementation of Next Generation Reservoir Computing with RRAM-Based Hybrid Digital-Analog System 基于RRAM的数字模拟混合系统的下一代水库计算的硬件实现

ADVANCED INTELLIGENT SYSTEMS

IF6.1

2024-07-03

OAAI

Dong, Danian; Zhang, Woyu; Xie, Yuanlu; Yue, Jinshan; Ren, Kuan; Huang, Hongjian; Zheng, Xu; Sun, Wen Xuan; Lai, Jin Ru; Fan, Shaoyang; Wang, Hongzhou; Yu, Zhaoan; Yao, Zhihong; Xu, Xiaoxin; Shang, Dashan; Liu, Ming

2T2R RRAM-Based In-Memory Hyperdimensional Computing Encoder for Spatio-Temporal Signal Processing 用于时空信号处理的基于2T2R RRAM的内存中超维计算编码器

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2024-05-01

PREAI

Li, Zhi; Bao, Rui; Zhang, Woyu; Wang, Fei; Wang, Jun; Fang, Renrui; Ren, Haoxiong; Lin, Ning; Yue, Jinshan; Dou, Chunmeng; Wang, Zhongrui; Shang, Dashan

Fully Binarized Graph Convolutional Network Accelerator Based on In-Memory Computing with Resistive Random-Access Memory 基于电阻式随机存取存储器内存计算的全二值化图形卷积网络加速器

ADVANCED INTELLIGENT SYSTEMS

IF6.1

2024-03-25

OAAI

Zhang, Woyu; Li, Zhi; Zhang, Xinyuan; Wang, Fei; Wang, Shaocong; Lin, Ning; Li, Yi; Wang, Jun; Yue, Jinshan; Dou, Chunmeng; Xu, Xiaoxin; Wang, Zhongrui; Shang, Dashan

A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity 基于28 nm内存计算的超分辨率加速器，结合了宏级管道和纹理/代数稀疏性

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

IF5.2

2024-02-01

PREAI

Wu, Hao; Chen, Yong; Yuan, Yiyang; Yue, Jinshan; Fu, Xiangqu; Ren, Qirui; Luo, Qing; Mak, Pui-In; Wang, Xinghua; Zhang, Feng

LSAC: A Low-Power Adder Tree for Digital Computing-in-Memory by Sparsity and Approximate Circuits Co-Design LSAC: 通过稀疏性和近似电路协同设计用于内存中数字计算的低功耗加法器树

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2024-02-01

PREAI

He, Chaojie; Wang, Zi; Xiang, Feibin; Dai, Zhuoyu; He, Yifan; Yue, Jinshan; Liu, Yongpan

研究方向