Erik Jan Marinissen - Publications, H-index & Citations

Erik Jan Marinissen

imec, leuven, belgium

45H指数

281论文数

7.4K被引数

收录论文 8

发表时间

A Bypassable Scan Flip-Flop for Low Power Testing With Data Retention Capability

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS

IF4.9

2022-02-01

OAAI

Cao, Xugang; Jiao, Hailong; Marinissen, Erik Jan

Defect and Fault Modeling Framework for STT-MRAM Testing

IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING

IF5.4

2021-04-01

OAAI

Wu, Lizhou; Rao, Siddharth; Taouil, Mottaqiallah; Medeiros, Guilherme Cardoso; Fieback, Moritz; Marinissen, Erik Jan; Kar, Gouri Sankar; Hamdioui, Said

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2021-01-01

OAAI

Wu, Lizhou; Rao, Siddharth; Taouil, Mottaqiallah; Marinissen, Erik Jan; Hamdioui, Said; Kar, Gouri Sankar

Abort-on-Fail Test Scheduling for Modular SOCs without and with Preemption

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2015-12-01

PREAI

Ingelsson, Urban; Goel, Sandeep Kumar; Larsson, Erik; Marinissen, Erik Jan

Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling 具有分层核心的soc测试: 常见谬误，测试访问优化和测试调度

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2009-03-01

OAAI

Goel, Sandeep Kumar; Marinissen, Erik Jan; Sehgal, Anuja; Chakrabarty, Krishnendu

Test access mechanism optimization, test scheduling, and tester data volume reduction for system-on-chip

IEEE TRANSACTIONS ON COMPUTERS

IF3.8

2003-12-01

OAAI

Iyengar, V; Chakrabarty, K; Marinissen, EJ

Challenges in testing core-based system ICs

IEEE COMMUNICATIONS MAGAZINE

IF8.2

1999-06-01

PREAI

Marinissen, EJ; Zorian, Y

Guest Editorial 2.5D/3D Chiplet Circuits and Systems, EDA, Advanced Packaging, and Test—Part I 客座编辑 2.5D/3D 芯粒电路与系统、EDA、先进封装及测试——第一部分

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

IF3.8

PREAI

Qinfen Hao; Kuan-Neng Chen; Sandeep Kumar Goel; Hai Li; Erik Jan Marinissen

研究方向