Vojtěch Mrázek - Publications, H-index & Citations

Vojtěch Mrázek

Brno University of Technology

17H指数

80论文数

1.4K被引数

收录论文 7

发表时间

TransInferSim: Toward Fast and Accurate Evaluation of Embedded Hardware Accelerators for Transformer Networks TransInferSim：面向Transformer网络嵌入式硬件加速器的快速准确评估

IEEE Access

IF3.6

2025-01-01

OAAI

Jan Klhufek; Alberto Marchisio; Vojtech Mrazek; Lukas Sekanina; Muhammad Shafique

Acceleration Techniques for Automated Design of Approximate Convolutional Neural Networks

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS

IF3.8

2023-03-01

PREAI

Pinos, Michal; Mrazek, Vojtech; Vaverka, Filip; Vasicek, Zdenek; Sekanina, Lukas

SagTree: Towards efficient mutation in evolutionary circuit approximation

SWARM AND EVOLUTIONARY COMPUTATION

IF8.5

2022-03-01

PREAI

Ceska, Milan; Matyas, Jiri; Mrazek, Vojtech; Sekanina, Lukas; Vasicek, Zdenek; Vojnar, Tomas

RoHNAS: A Neural Architecture Search Framework With Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks

IEEE ACCESS

IF3.6

2022-01-01

OAAI

Marchisio, Alberto; Mrazek, Vojtech; Massa, Andrea; Bussolino, Beatrice; Martina, Maurizio; Shafique, Muhammad

Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS

IF3.8

2020-12-01

PREAI

Mrazek, Vojtech; Sekanina, Lukas; Vasicek, Zdenek

Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits

APPLIED SOFT COMPUTING

IF6.6

2020-10-01

OAAI

Ceska, Milan; Matyas, Jiri; Mrazek, Vojtech; Sekanina, Lukas; Vasicek, Zdenek; Vojnar, Tomas

Efficient On-Chip Randomness Testing Utilizing Machine Learning Techniques 利用机器学习技术的高效片上随机性测试

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

IF3.1

2019-12-01

PREAI

Mrazek, Vojtech; Sekanina, Lukas; Dobai, Roland; Sys, Marek; Svenda, Petr

研究方向