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Nanoscale CMOS
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DOI：10.1109/5.752515.png)
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摘要
En 中文
This paper examines the apparent limits, possible extensions, and applications of CMOS technology in the nanometer regime. Starting from device scaling theory and current industry projections, we analyze the achievable performance and possible limits of CMOS technology from the point of view of device physics, device technology, and power consumption. Various possible extentions to the basic logic and memory devices are reviewed, with emphasis on novel devices that are structurally distinct from conventional bulk CMOS logic and memory devices. Possible applications of nanoscale CMOS are examined, with a view to better defining the likely capabilities of future microelectronic systems. This analysis covers both data processing applications and nondata processing applications such as RF and imaging. Finally, we speculate on the future of CMOS for the coming 15-20 years.
Keyword:
CMOS
device technology
memory
MOS
MOSFET
nanotechnology
scaling
ultralarge scale integration (ULSI)
very large scale integration (VLSI)
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