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J

John P. Hayes

university of michigan

55H-index
354Paper Count
1.1WCitation Count
Published Papers 12
Publication Date
Modeling and Mitigating Transient Errors in Logic Circuits
err2011-07-01
err22
errOAAI
errPolian, Ilia; Hayes, John P.; Reddy, Sudhakar M.; Becker, Bernd
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Optimal zero-aliasing space compaction of test responses
err1998-01-01
err51
PREAI
errChakrabarty, K; Murray, BT; Hayes, JP
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HYPERCUBE SUPERCOMPUTERS
err1989-01-01
err80
PREAI
errHAYES, JP; MUDGE, T
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