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C

Chenyun Pan

university of texas system

16H-index
106Paper Count
851Citation Count
Published Papers 12
Publication Date
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Novel FPGA Technology Mapping for Dual-Output LUTs: Methodology and Application
errIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IF2.9
err2026-05-01
err0
PREAI
errShang, Liuting; Lu, Sheng; Jung, Sungyong; Liang, Qilian; Pan, Chenyun
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System Scenario-Based Design of the Last-Level Cache in Advanced Interconnect-Dominant Technology Nodes
errACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS
IF2.6
err2025-09-01
err1
errOAAI
errMayahinia, Mahta; Marinelli, Tommaso; Pei, Zhenlin; Liu, Hsiao-Hsuan; Pan, Chenyun; Tokei, Zsolt; Catthoor, Francky; Tahoori, Mehdi
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Interconnect/Memory Co-Design and Co-Optimization Using Differential Transmission Lines
errIEEE Transactions on Very Large Scale Integration (VLSI) Systems
IF3.1
err2025-09-01
err0
PREAI
errZhenlin Pei; Hsiao-Hsuan Liu; Mahta Mayahinia; Mehdi Tahoori; Francky Catthoor; Zsolt Tokei; Prashant Dubey; Chenyun Pan
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An Efficient Multi-Output LUT Mapping Technique for Field-Programmable Gate Arrays
errELECTRONICS
IF2.6
err2025-04-27
err0
errOAAI
errLu, Sheng; Shang, Liuting; Qu, Qianhou; Jung, Sungyong; Liang, Qilian; Pan, Chenyun
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errSave
Future Design Direction for SRAM Data Array: Hierarchical Subarray With Active Interconnect
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2024-12-01
err1
PREAI
errLiu, Hsiao-Hsuan; Gilardi, Carlo; Salahuddin, Shairfe M.; Pei, Zhenlin; Schuddinck, Pieter; Xiang, Yang; Weckx, Pieter; Hellings, Geert; Bardon, Marie Garcia; Ryckaert, Julien; Pan, Chenyun; Mitra, Subhasish; Catthoor, Francky
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Ultra-Scaled E-Tree-Based SRAM Design and Optimization With Interconnect Focus
errIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IF5.2
err2024-10-01
err1
PREAI
errPei, Zhenlin; Liu, Hsiao-Hsuan; Mayahinia, Mahta; Tahoori, Mehdi B.; Catthoor, Francky; Tokei, Zsolt; Abdi, Dawit Burusie; Myers, James; Pan, Chenyun
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A Low-Noise, Low-Offset CMOS Readout IC for Amperometric Biosensors
errIEEE ACCESS
IF3.6
err2024-01-01
err0
errOAAI
errChilukuri, Manu; Lakshminarayana, Shanthala; Park, Hyusim; Pan, Chenyun; Chung, Hoon-Ju; Jung, Sungyong
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An improved multi-timescale coordinated control strategy for an integrated energy system with a hybrid energy storage system
errAPPLIED ENERGY
IF11
err2023-08-01
err34
errOAAI
errPan, Chenyun; Fan, Hongtao; Zhang, Ruixiang; Sun, Jie; Wang, Yu; Sun, Yaojie
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errSave
Towards Area Efficient Logic Circuit: Exploring Potential of Reconfigurable Gate by Generic Exact Synthesis
errIEEE OPEN JOURNAL OF THE COMPUTER SOCIETY
IF8.2
err2023-01-01
err3
errOAAI
errShang, Liuting; Naeemi, Azad; Pan, Chenyun
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errSave
Multi-Objective Optimization of a Battery-Supercapacitor Hybrid Energy Storage System Based on the Concept of Cyber-Physical System
errELECTRONICS
IF2.6
err2021-07-28
err8
errOAAI
errPan, Chenyun; Tao, Shengyu; Fan, Hongtao; Shu, Mengyao; Zhang, Yong; Sun, Yaojie
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A Fast System-Level Design Methodology for Heterogeneous Multi-Core Processors Using Emerging Technologies
errIEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
IF3.8
err2015-03-01
err6
PREAI
errPan, Chenyun; Naeemi, Azad
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A Novel RFET-Based FPGA Architecture Based on Delay-Aware Packing Algorithm
errIEEE Transactions on Emerging Topics in Computing
IF5.4
err
err0
PREAI
errSheng Lu; Liuting Shang; Sungyong Jung; Qilian Liang; Chenyun Pan
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errSave

Research Directions

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Co-authors
Cooperation Journals
S
Subhasish Mitra
H-index: 70 · Papers: 488
F
Francky Catthoor
H-index: 57 · Papers: 1.4K
M
Mehdi B. Tahoori
H-index: 45 · Papers: 653
J
Julien Ryckaert
H-index: 39 · Papers: 264
Q
Qilian Liang
H-index: 36 · Papers: 375
View more