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SaveA data-centric chip design agent framework for Verilog code generation
Chang, Kaiyan; Zhu, Wenlong; Wang, Kun; He, Xinyang; Yang, Nan; Chen, Zhirong; Jin, Dantong; Li, Cangyuan; Zhou, Yunhao; Yan, Hao; Zhao, Zhuoliang; Cheng, Yuan; Wang, Mengdi; Liang, Shengwen; Han, Yinhe; Li, Xiaowei; Li, Huawei; Wang, Ying
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SaveAutoSilicon: Scaling Up RTL Design Generation Capability of Large Language Models
Li, Cangyuan; Chen, Chujie; Pan, Yudong; Xu, Wenjun; Liu, Yiqi; Chang, Kaiyan; Wang, Yujie; Wang, Mengdi; Li, Huawei; Han, Yinhe; Wang, Ying
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SaveA visual cortex-inspired edge neuromorphic hardware architecture with on-chip multi-layer STDP learning
He, Junxian; Tian, Min; Jiang, Ying; Wang, Haibing; Wang, Tengxiao; Zhou, Xichuan; Liu, Liyuan; Wu, Nanjian; Wang, Ying; Shi, Cong
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SaveDechlorane plus in dust, hair and urine: Exposure, excretion and level change
Wang, Erde; Zhang, Yan; Li, Tianwei; Jiang, Junjie; Fan, Yuhao; Wang, Ying; Hu, Jicheng; Jin, Jun
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