Narendar Vadthiya - Publications, H-index & Citations

Narendar Vadthiya

National Institute of Technology Warangal

22H指数

78论文数

1.3K被引数

收录论文 26

发表时间

Compositional tuning of metastable ferroelectric phases and Landau-reconstructed negative-capacitance energy landscapes in combinatorial Hf1-xZrxO2 thin films 组合Hf1-xZrxO2薄膜中准稳态铁电相的组分调控与朗道重构负电容能量景观

Scientific Reports

IF3.9

2026-08-07

OAAI

T. Bhavani; Radha Bayya; Astita Dubey; Shuvam Pawar; Narender Malishetty; Narendar Vadthiya; Dhiren K. Pradhan; T. Venkatappa Rao; Ashok Kumar; Atul Thakre; Hitesh Borkar

Zr4+-Tailored TiO2 Memristors With Highly Linear Synaptic Plasticity for Neuromorphic Learning and Low-Power Memory Technologies 锆离子调控的二氧化钛忆阻器，具有高度线性的突触可塑性，用于神经形态学习和低功耗存储技术

Advanced Materials Technologies

IF6.2

2026-08-03

PREAI

Vaishali Chandmare; Kusum Kumari; R. J. Choudhary; Vinay Palaparthy; Narendar Vadthiya; Hitesh Borkar

Defect-Controlled Ti-Doped Perovskite Memristors for High Accuracy Neuromorphic Computing 缺陷调控的Ti掺杂钙钛矿忆阻器用于高精度神经形态计算

Advanced Materials Technologies

IF6.2

2026-08-02

PREAI

Narender Malishetty; Vaishali Chandmare; Narendar Vadthiya; Hitesh Borkar

Towards the next era of CMOS scaling: A comprehensive review on the emerging landscape of complementary FET technology 迈向CMOS缩放的新时代：互补场效应晶体管技术新兴格局的全面综述

Materials Science in Semiconductor Processing

IF4.6

2026-05-25

PREAI

Sresta Valasa; Venkata Ramakrishna Kotha; Narendar Vadthiya

Engineering the Spacer for Junctionless Comb-shaped Nanosheet FETs at Sub-5 nm Node: Device to Circuit Realization 在sub-5 nm节点下工程化结less梳状纳米片FET的间隔层：从器件到电路的实现

Micro and Nanostructures

IF3

2026-05-09

PREAI

Thomas Daniel; Shiny Angel; Sresta Valasa; Venkata Ramakrishna Kotha; Sunitha Bhukya; Narender Malishetty; Narendar Vadthiya

Interfacial ion dynamics and synaptic behavior in Ag/MoS2/TiO2 heterostructure memristor for neuromorphic applications 异质结构忆阻器中Ag/MoS2/TiO2界面的离子动力学及突触行为，用于神经形态应用

Materials Science in Semiconductor Processing

IF4.6

2026-05-05

PREAI

Narender Malishetty; Vaishali Chandmare; Narendar Vadthiya; Hitesh Borkar

Thermal-aware performance analysis of a junctionless T-shaped nanosheet FET: a comprehensive study on digital; analog; RF; and circuit applications 无结t形纳米片FET的热感知性能分析: 数字、模拟、射频和电路应用的综合研究

Physica Scripta

IF2.6

2026-01-15

PREAI

Naresh Bopparathi; Narendar Vadthiya

Reliability Analysis of Strain Gauge-Based Pressure Sensors Integrated in Stored Weapon Systems 集成在存储武器系统中的基于应变片的压力传感器的可靠性分析

IEEE Transactions on Reliability

IF5.7

2025-12-30

PREAI

Praveen Tandon; Narendar Vadthiya

Benchmarking of junctionless nanosheet FET and T-shaped nanosheet FETs for sub-5 nm scalable CMOS: digital, analog/RF, and circuit-level insights 用于亚5 nm可扩展CMOS的无结纳米片FET和t形纳米片FET的基准测试: 数字，模拟/RF和电路级见解

SEMICONDUCTOR SCIENCE AND TECHNOLOGY

IF2.1

2025-11-30

PREAI

Bopparathi, Naresh; Vadthiya, Narendar

Comprehensive analysis of tree-shaped nanosheet FETs in junctionless; accumulation; and inversion structures at sub-5 nm node for next-generation digital; analog/RF and circuit applications 次5纳米节点下树状纳米片FET在结自由、积累和反转型结构中的综合分析，面向下一代数字、模拟/RF及电路应用

Physica Scripta

IF2.6

2025-10-24

PREAI

Jeshanth Madda; Sresta Valasa; Venkata Ramakrishna Kotha; Sunitha Bhukya; Narender Malishetty; Narendar Vadthiya

Design of energy-efficient LIF neuron using CMOS compatible gate-all-around floating nanosheet FET for bio-inspired spiking neural networks 基于CMOS兼容的全环绕浮动纳米片FET的高能效LIF神经元设计用于生物启发脉冲神经网络

Neurocomputing

IF6.5

2025-10-16

PREAI

Yashodhan Bhatawdekar; Syed Mohammad Riyaz; Lakshmi Amrutha Yechuri; Sresta Valasa; Venkata Ramakrishna Kotha; Sunitha Bhukya; Shubham Tayal; Narendar Vadthiya

Design Insights of Multilayer MoS2 Fin-Shaped FETs for Digital and Analog/RF Applications 多晶硅MoS2鳍形场效应晶体管在数字及模拟/射频应用中的设计见解

ACS Applied Electronic Materials

IF4.7

2025-07-26

PREAI

Venkata Ramakrishna Kotha; Sresta Valasa; Narendar Vadthiya

Insights Into Substrate Dielectric Engineering of Monolayer MoS₂ FET: Digital/Analog/RF Perspective to Circuit Implementation 单层MoS₂ FET的衬底介电工程研究：从数字/模拟/射频视角到电路实现

IEEE Transactions on Dielectrics and Electrical Insulation

IF3.1

2025-06-01

PREAI

Venkata Ramakrishna Kotha; Sresta Valasa; Narendar Vadthiya

First demonstration of leaky-integrate and fire neuron based GAA nanosheet FET with ultra-low energy consumption down to 0.8fJ/spike for spiking neural network applications 首次基于GAA纳米片FET的漏电积分放电神经元在脉冲神经网络应用中的超低能耗演示，能耗低至0.8fJ/脉冲。

PHYSICA SCRIPTA

IF2.6

2025-05-20

PREAI

Kanche, Madhu; Adwaith, Dannayak Venkata Sai; Sai, V. Pavan; Kotha, Venkata Ramakrishna; Valasa, Sresta; Bhukya, Sunitha; Tayal, Shubham; Malishetty, Narender; Vadthiya, Narendar

Interface trap dynamics and thermal effects in novel junctionless dual gate inverted-U-shaped FinFETs for sub-5 nm node: device to circuit level implementation 用于亚5 nm节点的新型无结双栅极倒U形finfet中的界面陷阱动力学和热效应: 器件到电路级实现

JOURNAL OF PHYSICS D-APPLIED PHYSICS

IF3.2

2025-02-10

PREAI

Bandi, Bhanu Prakash; Sornapudi, Uday Sankar Srinivas; Valasa, Sresta; Kotha, Venkata Ramakrishna; Bhukya, Sunitha; Mudidhe, Praveen Kumar; Tayal, Shubham; Vadthiya, Narendar

Interface traps in the sub-3 nm technology node: A comprehensive analysis and benchmarking of negative capacitance FinFET and nanosheet FETs - A reliability perspective from device to circuit level

MICROELECTRONICS RELIABILITY

IF1.9

2024-09-01

PREAI

Valasa, Sresta; Kotha, Venkata Ramakrishna; Vadthiya, Narendar

Pushing the Boundaries: Design and Simulation Approach of Negative Capacitance Nanosheet FETs with Ferroelectric and Dielectric Spacers at the Sub-3 nm Technology Node for Analog/RF/Mixed Signal Applications

ACS APPLIED ELECTRONIC MATERIALS

IF4.7

2024-05-09

PREAI

Valasa, Sresta; Kotha, Venkata Ramakrishna; Vadthiya, Narendar