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TSV Cu Plating and Implications for CMP

delete2011-04-25
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PRE
AI
A
Aleksandar Radisic *
H
Harold Philipsen
M
M. Honoré
Y
Yu-Shuen Wang
N
N. Heylen
Z
Zaid El-Mekki
S
Silvia Armini
K
K. Vandersmissen
S
Simon Rodet
A
A. Van Ammel
H
H. Bender
C
Christel Drijbooms
K
Kris Vanstreels
W
Wouter Ruythooren
DOI:10.1149/1.3575437delete
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摘要

摘要

En 中文
In the work presented here, we focused on fabrication of Cu nails for 3D Stacked-Integrated-Circuits (3D-SIC) applications using electrochemical deposition from the bath with model ('open source') additives. We have studied the effects of bath composition on the Cu fill profile and overburden, and have also examined the correlations between phenomena observed during post-plating-processing and bath composition. Based on these results, we explored different approaches to improving Cu removal rate during Chemical Mechanical Polishing (CMP).
Keyword:
COPPER
ELECTRODEPOSITION
ADDITIVES
CHEMISTRY
VIAS
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期刊

Electronics 封面图
Electronics
IF:
2.6
论文数:
1.0W
被引数:
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机构

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interuniversity microelectronics centre
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